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If a slave device has already stored a byte into its SPDR register, that byte will be exchanged with the master’s byte. When a slave is addressed, it executes RS232Transmit() at which point full duplex (two-way) communications commences between the master and the selected slave. This allows standard point-to-point full duplex communications, as well as a multi-drop configuration with one master (a single QVGA Controller or a desktop computer) and multiple QVGA Controller slaves. For example, at 4800 baud (bits per second), each bit lasts about 200 microseconds (µs), and if communications are full duplex (e.g., if the QVGA Controller echoes each incoming character), then there is a serial interrupt every 100 µs or so. The primary serial channel can operate at standard speeds up to 19200 baud and can be configured for either RS232 (the default) or RS485 operation. You can use the QScreen’s RS485 link to create such a multi-drop serial network. You can use the QED Board’s RS485 link to create such a multi-drop serial network. This means that the unit cannot initiate a communication, it can only respond when addressed by the master computer. It provides a convenient means of connecting the QScreen Controller to a variety of peripheral devices, including analog to digital and digital to analog converters, real time clocks, and other computers which use high speed communication.
Because all of the serial I/O routines on the QScreen Controller are revectorable, it is very easy to change the serial port in use without modifying any high level code. The secondary channel is very useful for debugging application programs that communicate with other computers or I/O via the primary channel. The primary serial port, Serial1, is supported by the 68HC11's on-chip hardware UART (sometimes called a USART), and does not require interrupts to work properly. A hardware reset (pressing down on the reset switch) has the same effect. In fact, the program works the same as it did before, but now it is using the secondary serial port instead of the primary port -- and you didn’t even have to recompile the code! In fact, you have been using it all along as you worked through the examples in this document. Data translation between different machines can be performed with ease, and applications that communicate via the primary serial port can be debugged using the secondary channel. The master and slave can then exchange data. Also, in the diagram, the master QVGA Controller’s /SS (slave select) is configured as an output. InitRS485() configures Port D to ensure that bit 5 is an output.
The DWOM bit determines whether Port D needs pull-up resistors; it should be set to 0. The MSTR bit determines whether the device is a master or slave. If more than one slave tried to drive the transmit line simultaneously, their serial drivers would fight with each other for control of the bus. The data exchange format may be a line of ascii text. It is important to note that when the CPHA bit is 0, the /SS line must be de-asserted and re-asserted between each successive data byte exchange (M68HC11 Reference Manual, p.8-3). The CPOL and CPHA bits configure the synchronous clock polarity and phase and specify when valid data is present on the MISO and MOSI data lines. 0), and expect valid data to be present on rising clock edges. The SCK (serial clock) pin is a configurable synchronous data clock output. In general, all devices on a network should use the same phase, polarity, and baud rate clock signal.
You might also consider operating the secondary serial port at a lower baud rate to relax the timing constraints. 19200 baud, select the "Comm" item under the "Settings" menu and click on 19200 in the "Baud Rate" selection box. The Serial 2 port is dedicated to RS232 communications at up to 4800 baud. 1200 is the baud rate that you choose; you can specify any standard baud rate up to 4800 baud. The InitSPI() function provides a convenient way to initialize the SPI as the master at a 2MHz baud rate. This chapter describes those drivers, and presents code that makes it easy to configure the SPI for different data transfer rates and formats. If SPIF is set, reading the received data or initiating a new data transfer automatically clears the SPIF bit. RS485Receive() clears bit PD5 to place the transceiver in receive mode, and RS485Transmit() sets bit PD5 to place the transceiver in transmit mode. The DWOM bit (port D wired-or mode) should always be set to 0. Setting DWOM to 1 takes away the processor’s ability to pull the Port D signals high unless there is a pull-up resistor on each bit of the port.
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